Feeling moved by some of the KIM-1 RetroChallenge entries, I had a thought last weekend: could I design an Apple IIe expansion card that acted as a KIM-1 simulator? The card could contain the address decoding circuitry, KIM-1 ROMs, I/O, and some RAM. Then, the keys could be from the Apple IIe, or maybe an external keypad. The Apple IIe would supply most of the RAM and the 6502 processor (of course). Utilizing the Apple IIe's INHIBIT (/INH) circuit would allow me to disable the IIe RAM and ROM and supply my own from the KIM-1, with out any address conflicts. The idea is so simple, I am surprised it hasn't been tried before. Researching the idea, I came across some schematics for building a modern KIM-1:
Upon further research, I found Zimmers.net FTP site, with an identical schematic but with a 74LS138 IC in position U9 However, upon further research on the 6532 RIOT there is still a problem. The 74LS138 decoder does not appear to create the appropriate signals to select the correct RIOT's onboard RAM, according to the 6532 RIOT datasheet and KIM-1 memory map (see end of full post for details). I searched around, and found a schematic for the Micro-Kim which corrects the problem with several NAND gates.
I wondered, 'Why decode the address lines just to NAND them back together in various ways'? I made chart of all of the addresses and the bit logic to encode them and I am fairly confident that the 6532 RIOTs can be properly addressed by:
- using A6 and a new /A6 as the chip selects
- inverting A7 to make a new /A7 as the RAM select
- using K5 as the other chip select
- using A8 as the high bit of the RAM Address (A6) so that we can address all of the RAM on both RIOTs
As a result, we get 2 RIOTs and 256K of addressable RAM with the same basic memory map of the KIM-1. We need a single 74LS04 IC to invert a few of the address signals (which we already need to invert A4, according to the above schematics), and there is no need for the 74LS138 decoder or the 74LS00 NAND IC used in the Micro-Kim.
I created a spreadsheet to list all of the address values and visualize the signals I need.
Details on 74LS138 decoder problem:
As I understand it, the 74LS138 will set 1 of 8 lines low depending on the state of the 3 address input lines. It "decodes" the binary address into a number, and selects (low logic) that line number.
Decoding this way is insufficient to select the 2 6532 RIOT's I/O and RAM separately, because the I/O needs the chip selected (/CS, CS) and the RAM needs the chip selected (/CS, CS) and the RAM select (/RS) line selected. If the 74LS138 only selects one line at a time, the RAM will never be selected while the chip is selected. i.e.: /CS and /RS will never be enabled at the same time, so you can't use the RAM.